1. Field of the Invention
The present invention relates to a shift register, and more particularly, to a shift register for use as a scanning-line driving circuit for an image display apparatus or the like, which is formed of field effect transistors of the same conductivity type only.
2. Description of the Background Art
An image display apparatus (hereinafter referred to as a “display apparatus”) such as a liquid crystal display includes a display panel in which a plurality of pixels are arrayed in a matrix. A gate line (scanning line) is provided for each row of pixels (pixel line), and gate lines are sequentially selected and driven in a cycle of one horizontal period of a display signal, so that a displayed image is updated. As a gate-line driving circuit (scanning-line driving circuit) for sequentially selecting and driving pixel lines, i.e., gate lines, a shift register for performing a shift operation in one frame period of a display signal can be used.
To reduce the number of steps in the manufacturing process of a display apparatus, such shift register used as the gate-line driving circuit is preferably formed of field effect transistors of the same conductivity type only. Accordingly, various types of shift registers formed of N- or P-type field effect transistors only and display apparatuses containing such shift registers have been proposed (e.g., “Highly Stable Integrated Gate Driver Circuit using a-Si TFT with Dual Pull-down Structure” Soon Young Yoon, et al., SIC 05 DIGEST, pp. 348-351). As a field effect transistor, a metal oxide semiconductor (MOS) transistor, a thin film transistor (TFT), or the like is used.
A shift register used for the gate-line driving circuit is formed of a plurality of shift registers provided for each pixel line, i.e., each gate line connected in cascade (cascade-connected). For ease of description, each of a plurality of shift registers constituting the gate-line driving circuit will be called “a unit shift register” throughout the present specification.
A typical unit shift register includes, in the output stage, an output pull-up transistor connected between an output terminal and a clock terminal and an output pull-down transistor connected between the output terminal and a reference voltage terminal. In such unit shift register, a clock signal input to the clock terminal with the output pull-up transistor turned on and the output pull-down transistor turned off by a predetermined input signal is transmitted to the output terminal, so that an output signal is output. In contrast, the output pull-up transistor is turned off and the output pull-down transistor is turned on during a period in which the input signal is not input, so that the voltage level (hereinafter briefly called “level”) at the output terminal is maintained at the L level.
A display apparatus employing amorphous silicon TFTs (a-Si TFTs) as shift registers of a gate-line driving circuit easily achieves large-area display with great productivity, and is widely used as the screen of a notebook PC, a large-screen display apparatus, etc.
Conversely, an a-Si TFT tends to have its threshold voltage shifted in the positive direction when the gate electrode is continuously positively biased (dc-biased), resulting in degraded driving capability (current-flowing capability). Particularly in a shift register of a gate-line driving circuit, an operation in which the gate of the output pull-down transistor is positively biased for about one frame period (about 16 ms) is continuously carried out, which gradually degrades the output pull-down transistor in driving capability. Then, the output pull-down transistor cannot discharge unnecessary charges when supplied to the output terminal due to noise or the like, resulting in a malfunction of erroneous activation of gate lines.
To solve the problem, the aforementioned paper by S. Y. Yoon, et al. presents a gate driver circuit in which dual output pull-down transistors are provided in parallel for an output terminal of a unit shift register and are alternately activated/deactivated by each frame so that the gate electrode of one of the output pull-down transistors is not continuously biased.
However, such dual output pull-down transistors provided for a unit shift register requires dual circuits (pull-down driving circuits) for driving the dual pull-down transistors to be provided in the unit shift register, which raises a concern about resultant increased consumption power.